个人电力工程项目：设计，制造和测试的AM系统-Individual Project: Design, build and test an AM system

The system will consist of a transmitter (modulator) and receiver (demodulator) along with input and output filters and amplifiers as required. Only +5V and -5V supply voltages are to be used and amplifiers/buffers should be based on the TL071 op-amp. 

The modulating input signal will sinusoidal waveform in the range 250Hz – 1.5kHz and the carrier frequency will be in the 15-25kHz range. Each student is assigned different carrier and signal frequencies as shown below. 

Transmitter 

The carrier frequency will be provided by a signal generator. You should build an oscillator (e.g. Wien bridge) to provide the modulating signal. The modulating signal input to the transmitter should have an amplitude of no more than 200mV. Amplitude modulation should be achieved using a switching modulator. 

Transmission line 

In a real system a transmission line would typically have 50Ω impedance. In the project the transmission line will be replaced with a 50Ω resistor to provide the impedance between transmitter and receiver. 

Receiver 

The receiver will be based on an envelope detector with additional filtering as required to give an output signal which is a replica of the input modulating signal. 

The output from the receiver should be AC coupled with an amplitude of at least 200mV when driving a 50Ohm load. 

Any filters required at the transmitter and receiver should be simple RC filter designs. 

 

Background reading, a block diagram of the system and some suggested circuits are provided on Blackboard to help you with your system design. 

 

Project Marking Scheme 

The individual project contributes 30% to your EE2AEL overall mark.  All work will be carried out individually Marks are divided between the simulation/design, practical work and full system demonstration as detailed below. 

 

 

Circuit design and simulation (40%) 

 

Switching Modulator Input: 5% 

Switching Modulator Output: 10% 

Transmission Line Input:  5% 

Envelope Detector (demodulator): 10% 

System Output: 10% 

 

Students who have not completed the design and simulation by the end of the 2nd Project session will be given a model answer design to build and test and will lose a minimum of 50% of the mark for the design and simulation part of the assessment. 

 

Practical build and demonstration (60%) 

 

Switching Modulator Input: 5% 

Switching Modulator Output: 15% 

Transmission Line Input:  5% 

Envelope Detector (demodulator): 15% 

System Output: 20% 

 

Practical work will be undertaken in the three lab sessions in weeks 9, 10 & 11.http://www.ukthesis.org/dissertation_writing/Engineering/ The final circuit will be demonstrated before the end of the final session of term: 4pm  Friday 20th Dec. 

 

The lab may also be available for unsupervised work outside these sessions but this is not guaranteed and is strictly by prior arrangement with the lab technician.